Design And Reuse SoC News Alert

July 18, 2005

WELCOME

Michael,
Welcome to the issue of July 18, 2005 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

SPONSORED BY: eASIC, Corp.

NRE-free Structured ASIC

ASIC-like unit-cost, power and performance

FPGA-like ease of design (SRAM-LUT)

Flexible exchange between logic and distributed memory

No minimum volume required

Turnaround: < 2 weeks

Built-in clock tree, BIST, scan chain and power distribution

Easy post-fabrication debug - LUT reload

Variety of configurable I/Os

Embedded 8051 microcontroller

NEW IP/SOC PRODUCTS

High Efficiency Step-up DC-DC Converter on SMIC 0.18um from LTRIM Technologies

Bluetooth Protocol Stack & Profiles V1.2 from MindTree Consulting

RSA & EC Public Key Accelerator from Elliptic Semiconductor

USB Hi-Speed On-The-Go Controller for Multiple Peripheral Devices from CAST

Dual 10 Bit 40 Msps Analog to Digital Converter from Cadence Design Systems

VESA MDDI Transceiver from Mixel, Inc.

Low-power 12bit, 20MS/s Nyquist-Rate Dual ADC from AnaFocus

Pipelined FFT cores for Xilinx FPGA from RF Engines Ltd.

3-channel, 10-bit, 80/110MHz HDTV/PC-Graphics AFE with full synchronism processing from ChipIdea Microelectronics

INDUSTRY ARTICLES

Using SystemVerilog Assertions in RTL Code

Automated Transistor-Level Optimization in Standard-Cell Based Digital Design

NOR continues to battle NAND flash memory in the handset

COMMENTARY/ANALYSIS

Networking concepts inspire next-gen SoCs

Leaky chips test designers' Skills

SoC programming models needed, researchers say

Researcher calls for 'software-centric' SoC design

Innovation drives SoC performance, keynoters say

IN THE NEWS

IP/SOC PRODUCTS

MindTree adds Phonebook Access Profile and Basic Printing Profile to its Bluetooth EtherMind Stack and Profile Portfolio

Eureka Technology Successfully Validated and Demonstrated PCI Express Controller IP Core

ARM Demonstrates Highest Performance ARM11 Family Processor

Arasan Releases SDIO Spec Ver 1.20 Compliant SDIO Device IP

CHIPIDEA Announces Silicon Validation of a Very Compact 90nm 10-bit /105MHz ADC

DESIGN PLATFORMS / STRUCTURED ASIC

STMicroelectronics Unveils First in Family of Configurable System-on-Chip ICsSTMicroelectronics Unveils First in Family of Configurable System-on-Chip ICs

eASIC and Fastrack Form Partnership to Deliver NRE-Free Programmable ASIC

LSI Logic RapidChip(R) Platform ASIC Meets Military and Extended Industrial Temperature Range Specifications

DEALS

Aplus and Flextronics Semiconductor Sign Licensing Agreement for Embedded EEPROM

TransDimension Licenses High-Speed USB Intellectual Property and Software Solution to Chipidea

Atmel selects Mixed Signal IP from Silicon & Software Systems for CMOS Imaging Solutions

Aarohi Communications Extends ARC License Agreement

BUSINESS

ARM Leads Embedded Systems Development in China

Hong Kong pursues role as China's IP hub

MOSAID Adopts Shareholder Rights Plan

Growth Patterns of MEMS Industry Changing according to EmTech Research

FINANCIAL RESULTS

Philips sees no semiconductor upturn, consumer weakness

Rambus Reports Second Quarter Earnings

Virage Logic Announces Expectations of Preliminary Results for Third Fiscal Quarter of 2005

PEOPLE

Rambus Names Eric Ries Vice President and Managing Director of Japan Office

DESIGN SERVICES

Silicon Logic Engineering offers ASIC product development services

FOUNDRIES

Tower tips turnaround strategy

IBM announces new CMOS image sensor foundry offering

IBM to offer CMOS image sensor foundry services

Atmel's 0.18 Micron Radiation Hardened ASIC Integrates up to 5.5 Million Usable Gates

FPGA/CPLD

Actel Introduces Fusion Technology and Ushers in Era of the Programmable System Chip

Altera Offers Faster Speed Grade for High-Density Stratix II FPGAs

Lattice MachXO devices provide new low cost alternative to CPLDs and FPGAs

Interface Board Design Relies on LatticeEC FPGAs

FABLESS / IDM

Atmel Introduces a Ready-to-Use Ultra-Low-Power MP3 Decoder for Mobile Phones

Genesys Logic First to Market with PCI Express PIPE PHY Chip

ProMOS Debuts First 90nm Silicon with High Yield

Samsung Electronics First to Mass Produce 667 Mbps DDR2 Memory

NEW ON D&R WEB SITE

DSP on FPGA Corner :
This DSP Hot Corner explores if technology-optimized DSP IP or technology-independent IP generated/optimized by DSP Synthesis can meet the design requirements when mapped onto an FPGA.
In Cooperation with Synplicity

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The world's largest directory of Silicon IP (Intellectual Property), SoC Configurable Design Platforms and SOPC Products from 200 vendors

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D&R provides to the market the best intranet IP packaging and IP transfer solution compatible with any DDM and IP repository you have in house

Search for Silicon IP

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